Because of their wide RF bandwidth (~1 THz) and high breakdown voltages (BVCEO >3 V), npn-In0.53Ga0.47 As/InP double heterojunction bipolar transistors (DHBTs) have extensive applications in monolithic microwave integrated circuits (MMICs) such as high performance transceivers, near-terabit optical fiber link, and THz amplifiers in radar/imaging systems. The improvements in the performance of DHBTs were made possible because of device scaling. As the technology advances towards the next scaling generations, new challenges in the manufacturing techniques and the device designs are met. The purpose of this work is to provide solutions to the problems encountered in the fabrication and design of the base-emitter junction while scaling from 200 to sub-100 nm emitter width.

Two important issues regarding the base-emitter junction arises while scaling towards sub-100 nm emitter width. The process flow for the refractory emitter metal stack developed for 250-100 nm emitter width has already reached its limitation. In order to improve the transistor yield at a reduced linewidth without designing a new process flow, revisions have been made to the existing one. Employing the revised process flow, 75 nm-wide emitter is feasible. The overall transistor yield has also been improved. This increases the number of working devices per sample, enabling thorough device analyses.

Experimentally, a reduction of current gain (beta) associated with device scaling has been observed. In order to assess the causes of the reduction, the electron transport in the base is emulated by a commercial simulator. A model for DC-beta at high injection current density (25 mA/mum 2) was constructed by the comparison between the experimental and the simulation results. The model allows the estimation of beta which benefits the design of the future scaling generations of DHBTs.

It has been deduced from the model that the current originated from Auger recombination and lateral electron diffusion (via the surface and the bulk base semiconductor) are the dominant components that limit DC-beta. To suppress the diffusion current via surface, a process flow is developed to form passivating sidewall onto the base surface. Such process flow has already been incorporated into DHBT fabrication. Moreover, new geometries for the base-emitter junction have been designed on the purpose of reducing the Auger recombination rate and lateral electron diffusion in the bulk base region. According to the simulation results, the new designs could potentially improve DC-beta beyond 50 if the corresponding process flow could be adequately integrated.